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<div class="textblock">Here are the data structures with brief descriptions:</div><div class="directory">
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<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___shim.html" target="_self">XAieDma_Shim</a></td><td class="desc">This typedef is the Shim DMA instance </td></tr>
<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___shim_bd.html" target="_self">XAieDma_ShimBd</a></td><td class="desc">This typedef contains all the attributes for the BD configuration </td></tr>
<tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___shim_bd_axi.html" target="_self">XAieDma_ShimBdAxi</a></td><td class="desc">This typedef contains the AXI attributes for the BD </td></tr>
<tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___shim_bd_lk.html" target="_self">XAieDma_ShimBdLk</a></td><td class="desc">This typedef contains the lock attributes for the BD </td></tr>
<tr id="row_4_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___tile.html" target="_self">XAieDma_Tile</a></td><td class="desc">This typedef is the Tile DMA instance </td></tr>
<tr id="row_5_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___tile_bd.html" target="_self">XAieDma_TileBd</a></td><td class="desc">This typedef contains all the attributes for the BD configuration </td></tr>
<tr id="row_6_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___tile_bd_lock.html" target="_self">XAieDma_TileBdLock</a></td><td class="desc">This typedef contains the lock and base address attributes of the double buffer for the BD </td></tr>
<tr id="row_7_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_dma___tile_bd_xy.html" target="_self">XAieDma_TileBdXy</a></td><td class="desc">This typedef contains the X/Y 2D addressing attributes for the BD </td></tr>
<tr id="row_8_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl.html" target="_self">XAieGbl</a></td><td class="desc">The XAie driver instance data </td></tr>
<tr id="row_9_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl__1st_irq_cntr.html" target="_self">XAieGbl_1stIrqCntr</a></td><td class="desc">This typedef contains the attributes for 1st level interrupt controller set irq event register </td></tr>
<tr id="row_10_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___config.html" target="_self">XAieGbl_Config</a></td><td class="desc">This typedef contains configuration information for the device </td></tr>
<tr id="row_11_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___error_handler_st.html" target="_self">XAieGbl_ErrorHandlerSt</a></td><td class="desc">Struct XAieGbl_ErrorHandler - AIE error handler </td></tr>
<tr id="row_12_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___event_handler_st.html" target="_self">XAieGbl_EventHandlerSt</a></td><td class="desc">Struct XAieGbl_EventHandler - AIE event handler </td></tr>
<tr id="row_13_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___group_events.html" target="_self">XAieGbl_GroupEvents</a></td><td class="desc">This typedef contains the mask attributes for Group Events </td></tr>
<tr id="row_14_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___hw_cfg.html" target="_self">XAieGbl_HwCfg</a></td><td class="desc">This typedef contains the HW configuration data for the AIE array </td></tr>
<tr id="row_15_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_core_ctrl.html" target="_self">XAieGbl_RegCoreCtrl</a></td><td class="desc">This typedef contains the attributes for the Core control register </td></tr>
<tr id="row_16_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_core_p_c_event.html" target="_self">XAieGbl_RegCorePCEvent</a></td><td class="desc">This typedef contains the attributes for Core PC events </td></tr>
<tr id="row_17_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_core_sts.html" target="_self">XAieGbl_RegCoreSts</a></td><td class="desc">This typedef contains the attributes for the Core status register </td></tr>
<tr id="row_18_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_event_broadcast.html" target="_self">XAieGbl_RegEventBroadcast</a></td><td class="desc">This typedef contains the attributes for Event broadcast registers </td></tr>
<tr id="row_19_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_event_broadcast_clear.html" target="_self">XAieGbl_RegEventBroadcastClear</a></td><td class="desc">This typedef contains the attributes for Event broadcast clear registers </td></tr>
<tr id="row_20_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_event_broadcast_set.html" target="_self">XAieGbl_RegEventBroadcastSet</a></td><td class="desc">This typedef contains the attributes for Event broadcast set registers </td></tr>
<tr id="row_21_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_event_broadcast_value.html" target="_self">XAieGbl_RegEventBroadcastValue</a></td><td class="desc">This typedef contains the attributes for Event broadcast value registers </td></tr>
<tr id="row_22_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_event_generate.html" target="_self">XAieGbl_RegEventGenerate</a></td><td class="desc">This typedef contains the attributes for Event generate registers </td></tr>
<tr id="row_23_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_fld_attr.html" target="_self">XAieGbl_RegFldAttr</a></td><td class="desc">This typedef contains the attributes for the register bit fields </td></tr>
<tr id="row_24_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_locks.html" target="_self">XAieGbl_RegLocks</a></td><td class="desc">This typedef contains the attributes for the Release/Acquire register bit fields </td></tr>
<tr id="row_25_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_perf_counter.html" target="_self">XAieGbl_RegPerfCounter</a></td><td class="desc">This typedef contains the attributes for Performance Counter </td></tr>
<tr id="row_26_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_perf_counter_event.html" target="_self">XAieGbl_RegPerfCounterEvent</a></td><td class="desc">This typedef contains the attributes for Performance Counter Event </td></tr>
<tr id="row_27_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_perf_ctrl_reset.html" target="_self">XAieGbl_RegPerfCtrlReset</a></td><td class="desc">This typedef contains the attributes for Performance Counter reset registers </td></tr>
<tr id="row_28_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_perf_ctrls.html" target="_self">XAieGbl_RegPerfCtrls</a></td><td class="desc">This typedef contains the attributes for all Performance Counter ctrl registers </td></tr>
<tr id="row_29_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_pl_dwsz.html" target="_self">XAieGbl_RegPlDwsz</a></td><td class="desc">This typedef contains the attributes for the PL downsizer config register </td></tr>
<tr id="row_30_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_pl_dwsz_bypass.html" target="_self">XAieGbl_RegPlDwszBypass</a></td><td class="desc">This typedef contains the attributes for the PL downsizer enable register </td></tr>
<tr id="row_31_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_pl_dwsz_en.html" target="_self">XAieGbl_RegPlDwszEn</a></td><td class="desc">This typedef contains the attributes for the PL downsizer enable register </td></tr>
<tr id="row_32_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_pl_upsz.html" target="_self">XAieGbl_RegPlUpsz</a></td><td class="desc">This typedef contains the attributes for the PL upsizer config register </td></tr>
<tr id="row_33_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_bd_axi.html" target="_self">XAieGbl_RegShimBdAxi</a></td><td class="desc">This typedef contains the attributes for Shim DMA BD AXI word register </td></tr>
<tr id="row_34_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_bd_ctrl.html" target="_self">XAieGbl_RegShimBdCtrl</a></td><td class="desc">This typedef contains the attributes for Shim DMA BD Control word register </td></tr>
<tr id="row_35_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_bd_pkt.html" target="_self">XAieGbl_RegShimBdPkt</a></td><td class="desc">This typedef contains the attributes for Shim DMA BD packet word register </td></tr>
<tr id="row_36_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_column_reset.html" target="_self">XAieGbl_RegShimColumnReset</a></td><td class="desc">This typedef contains the attributes for Shim colum reset register </td></tr>
<tr id="row_37_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_dem_cfg.html" target="_self">XAieGbl_RegShimDemCfg</a></td><td class="desc">This typedef contains the attributes for Shim stream Demux config registers </td></tr>
<tr id="row_38_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_dma_bd.html" target="_self">XAieGbl_RegShimDmaBd</a></td><td class="desc">This typedef contains the attributes for Shim DMA BD data structure </td></tr>
<tr id="row_39_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_dma_ch.html" target="_self">XAieGbl_RegShimDmaCh</a></td><td class="desc">This typedef contains the attributes for Shim DMA channel registers </td></tr>
<tr id="row_40_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_dma_sts.html" target="_self">XAieGbl_RegShimDmaSts</a></td><td class="desc">This typedef contains the attributes for Shim DMA status registers </td></tr>
<tr id="row_41_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_mux_cfg.html" target="_self">XAieGbl_RegShimMuxCfg</a></td><td class="desc">This typedef contains the attributes for Shim stream Mux config registers </td></tr>
<tr id="row_42_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_shim_reset.html" target="_self">XAieGbl_RegShimReset</a></td><td class="desc">This typedef contains the attributes for Shim reset register </td></tr>
<tr id="row_43_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_strm_evt_port.html" target="_self">XAieGbl_RegStrmEvtPort</a></td><td class="desc">This typedef contains the attributes for stream switch event port select registers </td></tr>
<tr id="row_44_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_strm_mstr.html" target="_self">XAieGbl_RegStrmMstr</a></td><td class="desc">This typedef contains the attributes for Stream switch master port config register </td></tr>
<tr id="row_45_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_strm_slot.html" target="_self">XAieGbl_RegStrmSlot</a></td><td class="desc">This typedef contains the attributes for Stream switch slave slot config register </td></tr>
<tr id="row_46_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_strm_slv.html" target="_self">XAieGbl_RegStrmSlv</a></td><td class="desc">This typedef contains the attributes for Stream switch slave port config register </td></tr>
<tr id="row_47_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_strm_sw_event_port_select.html" target="_self">XAieGbl_RegStrmSwEventPortSelect</a></td><td class="desc">This typedef contains the attributes for Stream Switch Event Port Selection register </td></tr>
<tr id="row_48_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_bd2_d.html" target="_self">XAieGbl_RegTileBd2D</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD 2D word register </td></tr>
<tr id="row_49_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_bd_add.html" target="_self">XAieGbl_RegTileBdAdd</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD address word register </td></tr>
<tr id="row_50_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_bd_ctrl.html" target="_self">XAieGbl_RegTileBdCtrl</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD Control word register </td></tr>
<tr id="row_51_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_bd_int.html" target="_self">XAieGbl_RegTileBdInt</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD Interleave word register </td></tr>
<tr id="row_52_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_bd_pkt.html" target="_self">XAieGbl_RegTileBdPkt</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD Packet word register </td></tr>
<tr id="row_53_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_dma_bd.html" target="_self">XAieGbl_RegTileDmaBd</a></td><td class="desc">This typedef contains the attributes for Tile DMA BD data structure </td></tr>
<tr id="row_54_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_tile_dma_ch.html" target="_self">XAieGbl_RegTileDmaCh</a></td><td class="desc">This typedef contains the attributes for Tile DMA Channel registers </td></tr>
<tr id="row_55_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_timer.html" target="_self">XAieGbl_RegTimer</a></td><td class="desc">This typedef contains the attributes for Timer control and value regs </td></tr>
<tr id="row_56_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_trace_ctrls.html" target="_self">XAieGbl_RegTraceCtrls</a></td><td class="desc">This typedef contains the attributes for Trace ctrl registers </td></tr>
<tr id="row_57_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___reg_trace_event.html" target="_self">XAieGbl_RegTraceEvent</a></td><td class="desc">This typedef contains the attributes for Trace event registers </td></tr>
<tr id="row_58_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_gbl___tile.html" target="_self">XAieGbl_Tile</a></td><td class="desc">This typedef contains configuration information of the tiles </td></tr>
<tr id="row_59_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_aie_sim___stack_sz.html" target="_self">XAieSim_StackSz</a></td><td class="desc">This typedef contains all the stack range addresses derived from the map file </td></tr>
<tr id="row_60_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_sock_cli.html" target="_self">XSockCli</a></td><td class="desc">This typedef contains the socket attributes which make the Client socket instance </td></tr>
<tr id="row_61_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_x_sock_str.html" target="_self">XSockStr</a></td><td class="desc">This typedef contains pointer to the client socket instance for the same to be used in the memory IO functions </td></tr>
</table>
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